Data memory boost bid

A project called Memtonomy at Fraunhofer IESE, Germany, is aiming to tackle the memory storage challenge in driverless vehicles (writes Nick Flaherty).
The constantly growing use of sensors and AI components in driverless cars is creating the need for large amounts of data to be recorded, merged and analysed in real time.
For cost and energy-efficiency reasons, the control devices used for this increasingly need components originally developed for the consumer market. In particular, that includes memory devices such as DRAM and flash.
However, DRAM and flash memory pose major challenges in terms of performance, energy efficiency and functional safety, as currently they are mostly not qualified for safety-critical applications. That was demonstrated last year when a failure in a flash memory module was the cause of a major recall of Tesla vehicles.
The Memtonomy project aims to increase the bandwidth to memory while reducing the latency and power consumption. At the same time, it has to increase device reliability, because the storage systems have to meet the ISO 26262 safety standard for applications in vehicles.
However, the researchers say it is not yet clear how to use these memory modules and how they will perform in an automotive context with respect to bandwidth, latency, power, temperature, reliability, safety and security. “To the best of our knowledge, there are no investigations or publications that optimise DRAM memory with respect to future automotive applications,” they said.

They are using an open source simulation tool called DRAMsys developed by the Microelectronic Systems Design Research Group of the Technical University of Kaiserslautern and Fraunhofer IESE to analyse the performance of automotive memory modules for bandwidth, latency and power.
The latest version of the tool, DRAMSys4.0, uses virtual models that reflect the DRAM functions, power consumption and temperature. These models enable system designers to analyse the limiting factors in a design and identify issues with the current DRAM standards that apply for autonomous vehicles.
The tool provides a user-friendly trace analyser. The analysis helps researchers optimise the DRAM subsystem with respect to the controller architecture, power and thermal management, as well as device selection and channel configuration for driverless car applications.
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